1. Field of the Invention
The present invention relates to a technique for precisely aligning integrated circuit chips or wafers.
2. Related Art
Advances in semiconductor technology presently make it possible to integrate large-scale systems, including tens of millions of transistors, onto a single semiconductor chip. Integrating such large-scale systems onto a single semiconductor chip increases the speed at which such systems can operate, because signals between system components do not have to cross chip boundaries, and are not subject to lengthy chip-to-chip propagation delays. Moreover, integrating large-scale systems onto a single semiconductor chip significantly reduces production costs, because fewer semiconductor chips are required to perform a given computational task.
However, these semiconductor chips still need to communicate with other chips, and unfortunately, these advances in semiconductor technology have not been matched by corresponding advances in inter-chip communication technology. Semiconductor chips are typically integrated into a printed circuit board which contains multiple layers of signal lines for inter-chip communication. However, a semiconductor chip typically contains about 100 times to 1000 times more signal lines than a printed circuit board. Consequently, only a tiny fraction of the signal lines on a semiconductor chip can be routed across the printed circuit board to other chips. This problem is creating a bottleneck that is expected to worsen as semiconductor integration densities continue to increase.
To overcome this communication bottleneck, researchers have recently developed an alternative technique, known as “Proximity Communication,” to communicate between semiconductor chips. Proximity Communication can be implemented by integrating arrays of capacitive transmitters and receivers onto active surfaces of integrated circuit (IC) chips to facilitate inter-chip communication. If a first chip is situated face-to-face with a second chip so that transmitter regions on the first chip are capacitively coupled with receiver regions on the second chip, it is possible to transmit signals directly from the first chip to the second chip without having to route the signal through intervening signal lines within a printed circuit board. The advantage of such an arrangement is that a large number of electronic terminals on one chip can each communicate with corresponding electronic terminals on the other chip.
Proximity Communication makes it possible to communicate with an extremely large bandwidth per unit area. For example, in an exemplary implementation, the size and center-to-center pitch of Proximity Communication terminals can be 20 microns and 30 microns, respectively. Moreover, under Proximity Communication, signals travel in the direction normal to the surface of the chip. Therefore, Proximity Communication allows communication to take place across a fully populated two-dimensional array of terminals, with many rows and many columns.
For comparison purposes, the size and pitch of a typical wire bond terminal may be 100 microns on a side with a pitch of 150 microns from the center of one terminal to the neighboring terminal. Furthermore, wire bonds are typically limited to a few rows. Hence, wire bonds generally cannot be used to provide a large fully populated two-dimensional array of terminals.
Proximity Communication provides off-chip signaling bandwidth that can scale with the feature size and with the on-chip frequency. However, precise alignment constraints must be satisfied for Proximity Communication to operate effectively. FIG. 2 illustrates a top-view of two integrated circuit chips where the receiver pads on one integrated circuit chip are misaligned with the transmitter pads on the other integrated circuit chip. To effectively utilize the large bandwidth available through Proximity Communication, the receiver pads must be aligned with the transmitter pads as illustrated in FIG. 1. Hence, an alignment mechanism which can precisely align the integrated circuit chips is needed.
As continuing advances in integrated circuit technology make it possible to create denser and faster circuits, there is a need for even greater precision alignment between the two integrated circuit chips. This need continues to grow as the integrated circuits become increasingly more sophisticated and continue to increase in density.